Job responsibilities :
a. SOC Integration design flow include synthesis, DFT, MBIST, low power design, signoff, etc, in 28 / 16 / 7nm or more advance process node.
b. Sub-sys integration flow, include synthesis, low power design, DFT, MBIST etc.
c. Support SOC in physical implementation
d. IC production testing program and testing support
Requirement Job Requirements :
1. Master’s degree or above in microelectronics, computer, electronic engineering, communications and other related fields.
2. Familiar with Verilog, ASIC front-end design flow, with solid theoretical basis and practical ability of digital circuit.
3. Familiar with scripting development : Makefile / Tcl / Perl / Python, etc.
4. Good English communication.
5. Conscientious and meticulous working attitude, full of curiosity about technology.