At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.The Position Description are : a) Assist in Cadence hierarchical solution area development and validation.
b) Validate and maintain comprehensive hierarchical solution unit and flow test cases for Innovus Digital Implementation System.
c) Develop testsuites of the new features of hierarchical functional / flow solution.The Position Requirements are : a) MS or excellent undergraduate.
b) Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.c) Unix System knowledge, vi / TCL / TK / CSH / Perl will be plus.
d) Good communication in English and Chinese, good confidence and self-motivation.We're doing work that matters. Help us solve what others can't.
Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.
Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.